A modular VLSI architecture for neural networks implementation

Abstract

This paper describes a modular analog VLSI architecture for the implementation of artificial neural networks. Analog neural network implementations are faster and smaller than their digital counterparts, but the problem of smaller dynamic range of the analog weight memory and the linearity of the synapses based on analog multipliers increases the need for design effort at the circuit level. We suggest that a complex neural network system can be implemented in a single chip if a modular architecture design using simple analog circuits is followed. To demonstrate the VLSI implementability of the neural network system, a description of each analog circuit block is provided.