A modular architecture for adaptive predictive coders of digital television signals

Abstract

Introduction of reduced bit rate Television Communications Systems for Teleconference and Videophone applications heavily depends on coder and decoder costs. Redundancy reduction algorithms and image format are the basic parameters of coding complexity. The paper systematically analyses the modular organization of an adaptive prediction coder with movement compensation for time multiplexed full colour digital television. The redundancy reduction algorithm is represented in detail by its Z-transform, and then by a dependency graph which allows the introduction, at a high representation level, of the basic architectural parameters, parallelism and sequentiality. As a third step the modular architecture is introduced splitting the impact of format and algorithm complexity into module numbers and module architecture respectively. Modules are then realized with predetermined building blocks, computational and switching processors and two port memories. At last, implementation through LSI or VLSI circuit of some typical building blocks is described in order to gain a global idea of the system organization and structure. The paper describes, for the sake of concreteness, a specific and well known case of television redundancy reduction coding, but is also useful as an example of the global and systematic description of a complex digital electronic system.