A modified RBF neural network for efficient current-mode VLSI implementation

Abstract

A modified RBF neural network model is proposed allowing efficient VLSI implementation in both analog or digital technology. This model is based essentially on replacing the standard Gaussian basis function with a piece-wise linear one and on using a fast allocation unit learning algorithm for determination of unit centers. The modified RBF approximates optimally Gaussians for the whole range of parameters (radius and distance). The learning algorithm is fully on-line and easy to be implemented in VLSI using the proposed neural structures for on-line signal processing tasks. Applying the standard test problem of the chaotic time series prediction, the functional performances of different RBF networks were compared. Experimental results show that the proposed architecture outperforms the standard RBF networks, the main advantages being related with low hardware requirements and fast learning while the learning algorithm can be also efficient embedded in silicon. A suggestion for current-mode implementation is presented together with considerations regarding the computational requirements of the proposed model for digital implementations.