Abstract

Conventional crystalline silicon (c-Si) diffused P/N junction solar cells remain the largest contributor to solar electricity. In order to retain a high efficiency and as well, reduce the cost of solar electricity, Sanyo has proposed the “heterojunction with intrinsic thin layer (HIT)” solar cells where the emitter and the back surface field layers are deposited using low temperature (<200 °C) plasma processes, thus reducing the thermal budget and allowing for thinner wafers. Since solar cells are used in extremes of climate, we felt that it would be interesting to study the behaviour of c-Si and HIT cells, based on both P- and N-type wafers at different temperatures. Our results indicate that in HIT cells the amorphous doped layers form a heterojunction on the c-Si substrate, with a large valence band discontinuity that acts as a barrier for hole collection, specially at low temperatures. It is the aim of this article to investigate the effect of this valence band offset on solar cell performance at different ambient temperatures.

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