A MODEL OF A LOW POWER ANALOG-TO-DIGITAL CONVERTER BASED ON INVERTERS

Abstract

In nanometer technology, static and dynamic power consumption of integrated circuits becomes almost equivalent. The problem of energy consumption, in turn, leads to the occurrence of aging and self-heating phenomena in an integrated circuit, which are the main phenomena that undermine the reliability of modern integrated circuits. Thus, nowadays, such design models of integrated circuits are proposed, in which the elements with high power consumption miss. The resistors used in the classical model of a flash analog-todigital converter are a huge source of static power consumption. On the other hand, according to the requirements set to these resistors, they must serve as a source of reference voltages of various levels in the circuit, providing stable voltage values. However, it is known that after manufacturing there are significant deviations depending on the environmental thermal vibrations and operating frequencies of the system, therefore, these circumstances in many cases limit the use of a classical flash analog-to-digital converter. In addition to the above highlighted problems, the implementation of resistors in integrated circuits requires a large area, which is also a serious problem in the field of manufacturing modern integrated circuits. The paper proposes a new model of a flash analog-to-digital converter based on inverters with different levels of supply voltages. This converter avoids the use of resistors and comparators. The proposed model allows to receive a digital signal with an amplitude of 0.8 V using an input analog signal with an amplitude of 1.8 V. It has been designed for a 14 nm process at a temperature of 25°C. The application of the proposed method allows to reduce power consumption by 7·102 times in comparison with the classical circuit with comparators and a voltage divider.