A Mode-Matched DRG Realized by Monolithic Integrated Interface Circuit Design

Abstract

This article proposes a novel design method for the mode-matched disk resonator gyroscope (DRG) realized by the monolithic integrated interface circuit. The mode-mismatched dynamics model of DRG is simplified by introducing the analysis method of “slow” dynamics, the effect of mode mismatching is quantified, and the automatic mode-matched interface circuit is designed based on the analysis of the simplified model. The force-rebalance loop is designed based on a self-clock circuit that releases the chip from the dependence on external clocks, avoids the design of multipliers, analog-to-digital converters (ADCs), and digital-to-analog converters (DACs), and improves the integration of the chip. The highly integrated automatic mode-matching loop is realized by the designing of a quadrature loop and stiffness tuning loop on the basics of the mode-matching theory. The design method is applied to develop a monolithic integrated interface chip of DRG with an area of 4.2 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times4.3$ </tex-math></inline-formula> mm and power consumption of 90 mW. The DRG integrated circuit achieves the bias instability (BI) of 0.38°/h and the angle random walk (ARW) of 0.0354°/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\surd \text{h}$ </tex-math></inline-formula> within a full scale of ±300°/s, which provides a highly integrated circuit design scheme for DRG’s extensive application.