A minimum-distance search circuit using dual-line PWM signal processing and charge-packet counting techniques

M Nagata,T Yoneda,A Iwata,M Sano,D Nomasaki

doi:10.1109/isscc.1997.585252

A minimum-distance search circuit using dual-line PWM signal processing and charge-packet counting techniques

M Nagata, T Yoneda + Show 3 more

https://doi.org/10.1109/isscc.1997.585252

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Publication Date: Feb 6, 1997

Citations: 14

Affiliation: Hiroshima University, Higashihiroshima Medical Center, Industrial Research Institute of Shizuoka Prefecture

#Pulse Width Modulation #Intelligent Processing Systems + Show 8 more

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Abstract

This CMOS minimum distance search circuit (MDS) realizes pattern matching engines for multi-media and intelligent processing systems. The chip executes highly-parallel computation of Manhattan distances between an input vector and stored multiple reference vectors, and search of the minimum distance among them. Two novel circuit techniques are based on pulse width modulation (PWM) analog-digital merged circuits.

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