Abstract

A microprogrammable real-time video signal processor (VSP) LSI has been developed for constructing a parallel video signal processing system. The VSP LSI employs a flexible multistage pipelined architecture and can handle such sophisticated image signal processing as high-speed edge detection and motion compensation. It contains many operational function units such as an arithmetic logic unit and with absolute value calculation capability, a minimum/maximum value detector, a two-port SRAM, RAM address pointer and clocked bus lines. The VSP LSI has been designed using two different kinds of automatic layout programs. The chip, which was fabricated with a 2.5-/spl mu/m CMOS and double-layer metallization technology, has an area of 9.91/spl times/9.50 mm/SUP 2/ and contains about 48000 MOSFETs. It operates at a clock frequency of 14.3 MHz with a single 5-V power supply and typically consumes 240 mW. An experimental system, using a single VSP LSI chip, has been constructed in order to demonstrate various application capabilities, such as interframe difference operations, high-speed edge detection and motion compensation.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call