Abstract

Impedance matching is concurrent with any radio frequency (RF) circuit design and is essential for maximizing the gain and efficiency while minimizing the noise of high-frequency amplifiers as well as some mixer topologies. The main impedance matching network components are capacitors, inductors, and RF transformers all of which contain parasitic parameters that influence the matching response S11 curve. After calculating matching network component values using classical matching techniques, the measured and simulated response curves differ depending on the target frequency. This results in multiple calculations and measurement cycles in order to precisely match the source and load at the desired frequency. This article proposes an algorithm and methodology of estimating component parasitic parameters and taking them into account when calculating the main component parameters (capacitance and inductance). The proposed algorithm has been implemented as a toolbox in Cadence Virtuoso and verified through simulation and measurements. Measurement results show, that at 500 MHz 10% tolerance components with parasitics included and values based on classical theory provide a 3.2–9.8% offset from the target frequency. In the same conditions, matching networks with compensated (according to the proposed algorithm) values provide 0.1–8.8% target frequency offset. At 1500 MHz 10% components provided 4–12.3% (non-compensated) and 1–8.7% (compensated) target frequency offset ranges. At 3000 MHz. The frequency offset range of using compensated matching network component values is reduced from 5.5–15.1% to 1.3–8.1%.

Highlights

  • Impedance matching is concurrent with any radio frequency (RF) circuit design and is essential for maximizing the gain and efficiency while minimizing the noise of any high-frequency amplifier, either a low noise (LNA) or power (PA) amplifier, as well as some mixer topologies

  • As a result this paper proposes a methodology of including lumped surface-mount component parasitic parametersfine-tune such asthe equivalent series only resistance (ESR), equivalent series inductance (ESL)

  • The proposed algorithm is the step of optimizing this paper proposes a methodology of including lumped surface-mount component parasitic calculated parameters values based classical impedance matching theory can(ESL)

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Summary

Introduction

Impedance matching is concurrent with any radio frequency (RF) circuit design and is essential for maximizing the gain and efficiency while minimizing the noise of any high-frequency amplifier, either a low noise (LNA) or power (PA) amplifier, as well as some mixer topologies. Contend that impedance matching as a key problem in RF circuit design and state that power losses of more than 1 dB when the matching quality degrades by 50%. This is an issue in QAM64 communication systems as they require power accuracy between channels of around 0.1 dB. Impedance matching networks have various shapes and implementations, including narrow- and wide-band; lumped, distributed, and mixed; and single- and multi-band. All of the latter configurations can provide an optimal solution depending on the design constraints (area, price, frequency, source, and load impedances). This article aims at improving the Electronics 2018, 7, 188; doi:10.3390/electronics7090188 www.mdpi.com/journal/electronics

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