Abstract
A balance between static and dynamic losses of a power MOSFET is always desirable for accomplishing the maximum efficiency for a specific power converter. The standard semiconductor theory suggests that a minimum power dissipation in a MOSFET can be achieved by selecting a specific device active area. However, for power circuit designers, the active device area is unknown given that only datasheet parameters are available. Hence, in this paper, we propose a simple method, based on semiconductor theory, to select optimum power MOSFET from a family of MOSFETs using only datasheet parameters. By applying this optimization method to the specific power supply circuit under development, power engineers can select the best transistors to yield lowest power losses for the systems under development.
Highlights
Power semiconductor devices form the core of the modern power conversion systems.The overall efficiency of the power converters depends mainly on the losses attributed to power semiconductor devices
The total power dissipation in a power MOSFET consists of static loss that is determined by the on-resistance and dynamic loss that is determined by the parasitic capacitances [1]
The active device area that minimizes the total power dissipation depends on specific circuit configuration and parameters, such as the on-state current flowing through the power MOSFET and the switching frequency
Summary
Power semiconductor devices form the core of the modern power conversion systems. The overall efficiency of the power converters depends mainly on the losses attributed to power semiconductor devices. The standard semiconductor theory shows that the total power dissipation has a minimum for specific device active area [2]. This happens because an increase in the active area reduces the on-resistance, reducing static loss, but it increases the parasitic capacitances, increasing the dynamic loss. The power circuit designers do not know the active device area and the other needed semiconductor device parameters to determine the minimum power dissipation for a particular application; they cannot use the standard semiconductor theory of active device area to select the MOSFET with the optimum on-resistance. The proposed method is demonstrated by commercial superjunction (SJ) MOSFETs and silicon carbide (SiC) MOSFETs
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