Abstract
This paper describes an automatic cell generator that generates cells in metal—metal matrix (M 3) layout. To minimize the layout area, an ordering of the diffusion columns is determined by minimizing the net-density across the columns, as opposed to between the columns of the layout as is done in gate-matrix layout minimization. In addition, our algorithm considers the interaction between the PMOS region and the NMOS region of CMOS circuits. This method in conjuction with the switching network logic (SNL) approach can be used for design automation of VLSI circuits in double-metal technology as demonstrated through examples.
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