Abstract

Linear parallel interference cancellation (PIC) schemes are described and analyzed using matrix algebra. It is shown that the linear PIC, whether conventional or weighted, can be seen as a linear matrix filter applied directly to the chip-matched filtered received signal vector. An expression for the exact bit-error rate (BER) is obtained, and conditions on the eigenvalues of the code correlation matrix and the weighting factors to ensure convergence are derived. The close relationship between the linear multistage PIC and the steepest descent method (SDM) for minimizing the mean squared error (MSE) is demonstrated. A modified weighted PIC structure that resembles the SDM is suggested which approaches the minimum MSE (MMSE) detector rather than the decorrelator. It is shown that for a K-user system, only K PIC stages are required for the equivalent matrix filter to be identical to the the MMSE filter. For fewer stages, techniques are devised for optimizing the choice of weights with respect to the MSE. One unique optimal choice of weights is found, which will lead to the minimum achievable MSE at the final stage. Simulation results show that a few stages are sufficient for near-MMSE performance.

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