Abstract

On the basis of VLSI and high-density interconnection technologies, a parallel-processing system consisting of 1024 processors is proposed. A special feature of this system is the reconfigurability of data communication channels between processors, achieved by using a hyper-crossbar interconnection network to facilitate the operation of multiple data systems. Each processor possesses two communication channels, separately connected to a local crossbar network and to a global crossbar network (which are subnetworks of the hyper-crossbar network) for local communication and global communication, respectively. Processors connected to the same local network form a processor cluster for the execution of systolic-array-type algorithms. Primarily implemented by Livermore interactive network communication (LINC) chips, the global networks are able to programmably hold or delay operation data to synchronize the data flow for generic applications. With the operation speed of 20 MHz, the system can reach a peak performance of 40 billion operations per second. >

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