Abstract
Reconfigurable arrays are widely used as accelerators in specific fields relying on the energy efficiency advantages brought by the driving of data flow. With the increase of application range, when there are regions with different execution rates in the application, it will cause serious performance loss by adopting the traditional spatial mapping scheme to map the whole data flow graph directly. This paper proposes a mapping method based on data flow decoupling to solve the mismatch of execution rate by inserting decoupled elements (DEs) between regions with different execution rates. Meanwhile, a clustered interconnection structure and a multi-stage placement algorithm are proposed to map the decoupled Data Flow Graph (DFG), so as to reduce the interconnection overhead and improve the success rate of placement and routing for heterogeneous reconfigurable arrays. Compared with the traditional mapping scheme, the mapping scheme after decoupling the data flow can improve the execution performance by 57.68% on average while maintaining a high interconnection routability and reduce interconnection costs by 32% to 43%.
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