A low-power spread-spectrum clock generator with three-step frequency and VCO gain calibration for serial-ATA applications

Abstract

This paper presents a low power ring oscillator-based spread-spectrum clock generator with three-step frequency and voltage-controlled oscillator (VCO) gain calibration for S-ATA applications. To meet the low jitter requirements with a small VCO gain, a ring-type VCO with three step frequency calibration and gain calibration scheme is proposed. The proposed coarse tuning method selects the optimal tuning currents and capacitances of the ring VCO to optimize the phase noise. The gain of ring-type VCO can be reduced and kept constant with the proposed three-step frequency and VCO gain calibration. As a result, it can improve the phase noise characteristics of the ring-type VCO and make it more robust to the PVT variations. Also, charge pump up/down current mismatches are compensated with the current mismatch compensation block. This chip is fabricated with 65 nm CMOS technology, and the die area is 430 × 460 μm2. The power consumption is 12 mW at 1.2 V supply voltage. The measured RMS jitter and phase noise are 2.835 ps and ?96.83 dBc/Hz at 1 MHz offset, respectively.