A Low-Power Handheld Frequency-Hopped Spread Spectrum Transceiver Hardware Architecture

Abstract

The overall goal of this research project is to develop low-power personal communications transceiver hardware technologies, coupled with advanced systems techniques such as antenna diversity, channel coding, and adaptive power control, for achieving robust wireless digital data transmission over multipath fading channels. A frequency-hopped spread spectrum (FH/SS) code division multiple access (CDMA) technique was chosen over other multiple access schemes because a) it provides an inherent immunity to multipath fading; and b) the signal processing is performed at the hopping rate, which is much slower than the chip rate encountered either in a direct sequence (DS) CDMA or time division multiple access (TDMA) system, thereby potentially resulting in much lower receiver power consumption. Furthermore, frequency-shift keying (FSK) modulation with noncoherent detection in a frequency-hopped system results in a much simpler transceiver architecture as compared with coherent amplitude and phase modulation methods commonly used in DS and TDMA systems. Architectural innovations as well as advanced circuit techniques will be incorporated into the design of a portable handset to achieve minimum power and size without sacrificing robustness in performance. A 3-V CMOS implementation is being developed for the entire transceiver including the 900 MHz radio frequency (RF) front-end. Multiple miniature antennas will also be integrated into the handset to achieve the maximum diversity benefit for robust data transmission. The hardware and system technologies developed for the transceiver design will be general enough to be applicable to a wide variety of commercial and military wireless communications applications such as cellular and micro-cellular radios and telephones, wireless LANs, and wireless PBX systems. In order to validate the design techniques being proposed, a prototype all-CMOS transceiver handset with dual antenna diversity is being developed to demonstrate pedestrian-to-pedestrian communication over the 902-928 MHz band. This paper overviews the proposed FH/SS transceiver hardware architecture. The system rationale, analog and digital circuits, and antenna design techniques for the transceiver are also presented in the following sections.