Abstract
In this paper, a low-power and small-area all-digital spread spectrum clock generator (ADSSCG) is presented. The proposed ADSSCG can provide a programmable spreading ratio. In order to maintain the frequency stability while performing triangular modulation, a fast frequency and phase relock mechanism is proposed to overcome the process, voltage, and temperature (PVT) variations. The proposed ADSSCG is implemented in a standard performance 65nm CMOS process, and the active area is 100µm × 100µm. The simulation results show that the electromagnetic interference (EMI) reduction is 22.6dB with 1.3% spreading ratio at 270MHz and 18.9dB with 0.45% spreading ratio at 162MHz. The power consumption is 229µW at 270MHz with 1.0V power supply. Besides, the proposed ADSSCG is implemented with standard cells, and thus it can be easily ported to different processes in a very short time. Therefore, the proposed ADSSCG is suitable for system-on-chip (SoC) applications.
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