Abstract
This paper presents an all-digital low-power oscillator for reference clocks in wireless body area network (WBAN) applications. The proposed on-chip complementary metal-oxide-semiconductor (CMOS) oscillator provides low-frequency clock signals with low power consumption, high delay resolution, and low circuit complexity. The cascade-stage structure of the proposed design simultaneously achieves high resolution and a wide frequency range. The proposed hysteresis delay cell further reduces the power consumption and hardware costs by 92.4% and 70.4%, respectively, relative to conventional designs. The proposed design is implemented in a standard performance 0.18 μm CMOS process. The measured operational frequency ranged from 7 to 155 MHz, and the power consumption was improved to 79.6 μW (@7 MHz) with a 4.6 ps resolution. The proposed design can be implemented in an all-digital manner, which is highly desirable for system-level integration.
Highlights
Wireless communication and integrated circuit (IC) technologies continue to develop rapidly; this includes applications in medical services, which extend from closed in-hospital systems to any open-roaming system
The proposed design can be implemented in an all-digital manner, which is highly desirable for system-level integration
This paper proposes a high-resolution, wide-range, low-power reference clock generator for wireless body area network (WBAN) applications
Summary
Wireless communication and integrated circuit (IC) technologies continue to develop rapidly; this includes applications in medical services, which extend from closed in-hospital systems to any open-roaming system. A digitally controlled oscillator (DCO) has been proposed as a reference clock for low-power and highly integrated WBAN applications [7]. The output clock frequency of a DCO is generator for low-power and highly integrated WBAN applications [7]. If a quartz crystal as the reference clock generator, it can be integrated into a WSN, reducing the DCO replaces the quartz crystal as the reference clock generator, it can be integrated into a overall size and hardware costs of the device. This paper proposes a high-resolution, wide-range, low-power reference clock generator for WBAN applications. The proposed DCO architecture can be implemented in an all-digital CMOS design manner for cost and power reduction It is very suitable for biomedical chip applications and system integration.
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