A Low-Cost Hardware Design of a 1-D SPIHT Algorithm for Video Display Systems

Abstract

This paper presents low-cost compressors for video display systems, which compress video data to reduce the size of the frame memory in a display panel in a television or a smartphone. The hardware solution exploits the discrete wavelet transform (DWT) and 1-D set partitioning in hierarchical trees (SPIHT) to support the raster-scan processing order in a display system and meet the fixed target compression ratio (CR). However, the compression efficiency and hardware cost often increase in proportion to the block size and thus, designing a compressor with low cost but high fidelity is challenging. This paper proposes a generic partitioned SPIHT algorithm, which achieves a low-cost design for mobile devices by allowing various sizes of partitioned sub-blocks. By taking advantage of DWT decomposition properties, the proposed algorithm partitions a coding block into sub-blocks, each of which can be processed independently. The independent coding operations among multiple sub-blocks allow the size of the hardware buffer to be decreased, by storing the temporary results only for an individual sub-block. However, the proposed sub-block coding slightly decreases the compression efficiency when each sub-block is compressed with the same target CR. To reduce the drop-off in the compression efficiency, the boundary-pixel handling in DWT is exploited and the proposed partitioned SPIHT method adjusts the target CR for each sub-block depending on the potential quality loss. When compared with the previous 1-D design, experimental results show that the hardware gate count and internal memory are reduced by 59.34% and 75%, respectively. Furthermore, the proposed boundary handling and bit-allocation schemes mitigate the PSNR degradation due to the sub-block coding by 1.11 dB.