Abstract
An approach for designing analog current-mode circuits with very-low supply voltage requirements is described and applied to the implementation of basic complementary metal-oxide-semiconductor (CMOS) building blocks. The method is based on a biasing circuit exploiting poly resistors and auxiliary differential amplifiers which restricts supply requirements to one threshold voltage plus three saturation voltages. As design examples, a complementary current mirror, a current operational amplifier, and a transconductor are implemented adopting the proposed technique. SPICE simulations using a 0.5-/spl mu/m process are provided which closely confirm the expected overall good performance of these circuits especially in terms of low-voltage capability and speed.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
