Abstract
A low power, temperature compensated, robust design of CS amplifier is proposed in this paper. A new voltage reference is introduced to enhance reliability of the design and decrease sensitivity of design metrics to temperature changes. The temperature compensation effect is explained and analytically modeled. Further, the amplifier consumes 1.34× less power than the other topologies available in literature due to subthreshold operation of devices in the biasing circuit and is suitable for extremely high temperature applications. All theoretical results are validated with simulation results obtained by simulating the circuit using Virtuoso Analog Design Environment of Cadence @ 45-nm technology node using metal gate/high-K/strained silicon BSIM4 model.
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