A Low-Power Radiation Detection SoC With Neural Network Accelerator for Radioisotope Identification

Abstract

This work presents a low-power radiation detection and radioisotope identification System on Chip (SoC) featuring mixed-signal sensory electronics and on-chip neural network (NN) acceleration hardware. The chip electronics form a multichannel analyzer (MCA) to process the signal from an external radiation detector and produce an energy spectrum of the incoming radiation detections. The NN hardware accelerator then provides a novel means of using the spectrum to perform radioisotope identification. The chip is, thus, able to determine which radioisotopes are present in the radiation source. An on-chip 32-bit microcontroller (MCU) configures the analog front-end (AFE) electronics, oversees the NN hardware, and provides an interface to retrieve the histogram and NN data. The chip is fabricated on a 65-nm CMOS technology and consumes 8.8 mW while acquiring a histogram. In the tested configuration, the radioisotope identification NN takes <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$694~\mu \text{s}$ </tex-math></inline-formula> to execute, consuming <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.94~\mu \text{J}$ </tex-math></inline-formula> of energy and using 13.8 kB of RAM in the process. After training, the system correctly identified which isotopes were present in all histograms in a test set composed of combinations of four trained isotopes.