A low power, high performance multi-mode Delta-Sigma ADC for GSM, WCDMA and WLAN standards

Abstract

This paper presents a design and simulation of a reconfigurable delta sigma modulator (DSM) that can handle GSM / WCDMA/ WLAN standards. The modulator makes use of a low distortion suppression topology which is suitable for wide band application. In GSM mode a 2nd order DSM is used to achieve a peak SNR of 90 dB with over sampling ratio of 160 for bandwidth of 0.2 MHz. for WCDMA mode a 2nd order DSM modified by noise shaping enhancement technique with 3-bit quantizer is used to achieve a peak SNR of 75 dB with over sampling ratio of 16 and 2 MHz bandwidth. Eventually a 2-2 cascade mash architecture modified by noise shaping enhancement technique with 3-bit quantizer in both stage is presented to achieve a peak SNR of 54 dB with over sampling ratio of 8 for a bandwidth of 20 MHz in WLAN mode. Due to decreasing of the number of integrators and the unused block made off in the proposed modulator, the power consumption strongly has decreased.