A Low Power Dissipation Technique for a Low Voltage OTA

Abstract

This paper proposes a novel low power dissipation technique for a low voltage OTA. A conventional low power OTA with a class AB input stage is not suitable for a low voltage operation (±1.5 V supply voltages), because it uses composite transistors (referred to CMOS pair) which has a large threshold voltage. On the other hand, the tail-current type OTA needs a large tail-current value to obtain a sufficient input range at the expense of power dissipation. Therefore, the conventional tail-current type OTA has a trade-off between the input range and the power dissipation to the tail-current value. The trade-off can be eliminated by the proposed technique. The technique exploits negative feedback control including a current amplifier and a minimum current selecting circuit. The proposed technique was used on Wang’s OTA to create another OTA, named Low Power Wang’s OTA. Also, SPICE simulations are used to verify the efficiency of Low Power Wang’s OTA. Although the static power of Low Power Wang’s OTA is 122 μW, it has a sufficient input range, whereas conventional Wang’s OTA needs 703 μW to obtain a sufficient input range. However, we can say that as the input signal gets larger, the power of Low Power Wang’s OTA becomes larger.