A Low Power Delay Buffer Using Gated Driver Tree

Abstract

This project presents circuit design of a low-power delay buffer. The proposed delay buffer uses several new techniques to reduce its power consumption. Since delay buffers are accessed sequentially, it adopts a ring-counter addressing scheme. In the ring counter, double-edge-triggered (DET) flip-flops are utilized to reduce the operating frequency by half and the C-element gated-clock strategy is proposed. A novel gated- clock-driver tree is then applied to further reduce the activity along the clock distribution network. Moreover, the gated-driver-tree idea is also employed in the input and output ports of the memory block to decrease their loading, thus saving even more power. The simplest way to implement a delay buffer is to use shift registers. If the buffer length N is and the word-length is b , then a total of Nb DFFs are required, and it can be quite large if a standard cell for DFF is used. In addition, this approach can consume huge amount of power since on the average Nb/2 binary signals make transitions in every clock cycle. As a result, this implementation is usually used in short delay buffers, where area and power are of less concern. Although some power is indeed saved by gating the clock signal in inactive blocks, the extra R-S flip- flops still serve as loading of the clock signal and demand more than necessary clock power. We propose to replace the R-S flip-flop by a C-element and to use tree-structured clock drivers with gating so as to greatly reduce the loading on active clock drivers. Additionally, DET flip-flops are used to reduce the clock rate to half and thus also reduce the power consumption on the clock signal. The proposed ring counter with hierarchical clock gating and the control. Each block contains one C-element to control the delivery of the local clock signal CLK to the DET flip-flops, and only the CKE signals along the path passing the global clock source to the local clock signal are active. The gate signal (CKE) can also be derived from the output of the DET flip-flops in the ring counter.