Abstract

This paper presents a new scheme to reduce the power consumption in content addressable memory (CAM). A pulsed voltage is applied in search lines instead of constant high voltage in traditional CAM design during evaluation phase. Thus, the swing voltage of match lines (MLs) can be lowered as ML cannot be discharged to GND within pulsed voltage. In addition, the 9T latch comparator is used as the ML sense amplifier which can provide fast sensing operation as well as reducing power consumption. A 128∗32 CAM is simulated with SMIC 65nm process. The simulation result demonstrates that power consumption can be saved by 43.4% compared with the traditional CAM. The average energy consumption is 0.58 fJ/bit/search.

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