Abstract
A wideband 2–3 GHz three-stage low noise amplifier (LNA) featuring current reuse, cascaded L-type input matching network (IMN), and optimized multiple gated transistors method (MGTR) using 0.18-μm CMOS technology is presented in this paper. The current-reused topology is employed in the first two stages to reduce power consumption. For a wideband input matching, the common gate (CG) topology is adopted. Moreover, the cascaded L-type IMN composed of two single L-type networks cascaded in series is proposed for the first time. To improve the linearity performance, the optimized MGTR taking both transconductance gm and third-order nonlinear coefficient gm″ into consideration is proposed and applied to the output stage. The proposed LNA presents a maximum power gain of 28.0 dB, an input matching across 1.8–5.8 GHz and a high third-order input intercept point (IIP3) of −9.89 dBm. A noise figure (NF) of 3.1–3.5 dB is obtained in the required band with a power dissipation of 6.49 mA from a 3 V power supply.
Published Version
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