A Low-Noise Chopper Amplifier Designed for Multi-Channel Neural Signal Acquisition

Abstract

This paper proposed the design of a low-noise, low total harmonic distortion (THD) chopper amplifier for neural signal acquisition. A dc servo loop (DSL) based on active Gm-C integrator is proposed to reject the electrode-dc-offset (EDO). Architecture of a complementary input very low-transconductance (VLT) operational transconductance amplifier (OTA) was proposed and integrated in the active Gm-C integrator to improve the linearity as well as to reduce the noise, featuring a transconductance ranging from 45 pS to a few nS. The proposed amplifier was fabricated in a TSMC 0.18- $\mu \text{m}$ CMOS process, occupying an area of 0.2 mm 2, featuring a power consumption of $3.24~\mu \text{W}$ /channel under a 1.8-V supply voltage. The THD for a 5-mVpp input is lower than −61 dB. An input-referred thermal noise power spectral density (PSD) of 39 nV/ $\sqrt {\text {Hz}}$ is measured. The measured input-referred noise is $0.65~\mu \text {V}_{\text {rms}}$ in the 0.3–200-Hz frequency band and $2.14~\mu \text{V}_{\text {rms}}$ in the 200-Hz–5-kHz frequency band, respectively, leading to a noise-efficiency factor of 2.37 (0.3–200 Hz) and 1.56 (0.2 k–5 kHz). In addition, the high-pass corner frequency can be precisely configured and linearly adjusted with the external bias current from 0.35 to 54.5 Hz.