Abstract
A new power-rail electrostatic discharge (ESD) clamp circuit with ultra low leakage current and adjustable holding voltage, composed of an NMOS ESD clamp device and a new ESD detection circuit, is proposed in this chapter. The new ESD detection circuit has been verified in a 65-nm CMOS process. Simulating results show that the novel circuit has a standby leakage current of only 20.85 nA, which is two-orders lower than that of the traditional design. Also, by modifying the number of diodes in the circuit, we can adjust the holding voltage of the proposed ESD clamp circuit conveniently to achieve better immunity against mistrigger and transient-induced latch-on events.
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