A Low-Distortion Modulator Driver With Over 6.5-Vpp Differential Output Swing and Bandwidth Above 60 GHz in a 130-nm SiGe BiCMOS Technology

Abstract

Optimizing a modulator driver for linear and high-speed operation, while simultaneously achieving a high output voltage swing is very challenging. This paper investigates the design of a highly-linear, high-bandwidth yet power-efficient Mach-Zehnder modulator driver based on the breakdown voltage doubler concept, which overcomes the transistors’ physical limitations and enables output voltage swings twice as high as conventional differential pair amplifiers can provide. The low-power design was enabled by the use of an open-collector topology for the output stage as well as by employing resistors instead of current mirrors in order to provide the bias currents for the emitter-follower (EF) stages. We show that by means of this EF implementation approach, the power consumption can be reduced by 19% without sacrificing the circuit’s bandwidth and linearity. The driver achieves peak-to-peak differential output voltage swings above 6.5 V_pp,d and consumes 670 mW of DC power, being one of the most power-efficient drivers in the literature. The 3-dB bandwidth is 61.2 GHz and the total harmonic distortion is 1%, measured at 1 GHz and for the output swing of 6.5 V_pp,d. To the best of the authors’ knowledge, these are the highest linearity and output voltage swing reported in the literature for modulator drivers with bandwidths above 40 GHz.