A LoC Ion Imaging Platform for Spatio-Temporal Characterisation of Ion-Selective Membranes.

Abstract

In this paper, a complete Lab-on-Chip (LoC) ion imaging platform for analysing Ion-Selective Membranes (ISM) using CMOS ISFET arrays is presented. An array of 128 × 128 ISFET pixels is employed with each pixel featuring 4 transistors to bias the ISFET to a common drain amplifier. Column-level 2-step readout circuits are designed to compensate for array offset variations in a range of up to ±1 V. The chemical signal associated with a change in ionic concentration is stored and fed back to a programmable gain instrumentation amplifier for compensation and signal amplification through a global system feedback loop. This column-parallel signal pipeline also integrates an 8-bit single slope ADC and an 8-bit R-2R DAC to quantise the processed pixel output. Designed and fabricated in the TSMC 180 nm BCD process, the System-on-Chip (SoC) operates in real time with a maximum frame rate of 1000 fps, whilst occupying a silicon area of 2.3 mm × 4.5 mm. The readout platform features a high-speed digital system to perform system-level feedback compensation with a USB 3.0 interface for data streaming. With this platform we show the first reported analysis and characterisation of ISMs using an ISFETs array through capturing real-time high-speed spatio-temporal information at a resolution of 16 μm in 1000 fps, extracting time-response and sensitivity. This work paves the way of understanding the electrochemical response of ISMs, which are widely used in various biomedical applications.