A Lightweight Memory Access Pattern Obfuscation Framework for NVM

Abstract

Emerging Non-Volatile Memories (NVMs) are entering the mainstream market. With attractive performance, high density, and near-zero idle power, emerging NVMs are promising contenders to build future memory systems. On the other hand, their limited write endurance ( $10^6$ 10 6 to $10^8$ 10 8 write cycles) and enabling data remanence attacks remain as main challenges that could hinder the wide adoption of NVMs in many sectors. With the limited write-endurance of NVMs, implementing major security primitives, such as Oblivious RAM (ORAM) for memory access pattern obfuscation, become more challenging due to a massive extra-write operation demand, which will exacerbate the write endurance problem. Wear-leveling techniques aim at mitigating the endurance problem of NVM by shuffling locations and continuously changing the mappings of memory addresses to the actual memory cells. However, such wear-leveling techniques do not provide the access pattern obfuscation for security. In this letter, we propose a lightweight memory access pattern obfuscation framework for NVM, called O-NVM, a novel design that achieves both wear-leveling and obfuscation with an appealing level of performance and security (obfuscation) guarantees. Our experimental results show that the NVM's lifetime can be improved by $4-125\times$ 4 - 125 × , and the randomness of address access patterns can achieve the passing rate of statistics tests over 99 percent.