Abstract

The routability of a circuit is a critical challenge due to the complexity of design rules. Global routing produces a congestion map on a coarse grid and feeds the results to the placer to optimize the design for reducing detailed-route DRC violations. However, there is a growing gap between global routing and the actual violations in detailed routing. This miscorrelation may end up unroutable for back-end detailed routing. In this work, a methodology as well as the framework flow based on machine learning technique is proposed to effectively predict detailed routing violations. After extracting appropriate features from placement, fast global routing and detailed routing violations, we use support vector machine techniques to train the prediction model, different from regression framework. We then also develop a prediction model for DRC violation density which can be integrated into placers. Experimental results show that the proposed approach can effectively forecast routability during placement stage.

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