Abstract

This paper presents a novel frequency doubler that further enhances the superior performance of solutions based on the Gilbert-cell mixer. A novel scheme is proposed to operate the cell with a 25 % LO duty-cycle. This technique boosts the conversion gain by generating a square-wave like output current. Moreover, the use of a quadrature generation block, commonly adopted in mixer-based frequency doublers, is not required, thus improving the operation bandwidth. The duty-cycle is automatically regulated by a low-frequency feedback loop which ensures optimal operation against input power and PVT variations. The performance of a test chip in a SiGe - BiCMOS process is presented. With a low supply voltage of 1.5 V, the chip achieves 6 dB conversion gain, 5.7 dBm peak <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{P}_{\text{sat}}$</tex> and 17 % power efficiency at 20 G Hz. The doubler delivers <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{P}_{\text{sat}} &gt; 3\text{dB} \mathrm{m}$</tex> over more than one octave bandwidth. Experimental results compare favorably against previously reported frequency doublers in the same frequency range.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.