A Ka-Band Single-Chip SiGe BiCMOS Phased-Array Transmit/Receive Front-End

Abstract

This paper presents the detailed design and demonstration of a Ka-band single-chip transmit (TX)/receive (RX) front-end in 0.13- $\mu \text{m}$ SiGe BiCMOS technology. The front-end includes single-pole double-throw (SPDT) switches, low-noise amplifier, loss compensation amplifiers (LCAs), phase shifter, and power amplifier. Distributed structures are utilized in gain amplifiers to ensure broadband performance while stacked structure is adopted in power amplifier to deliver high output power in the TX mode. A 5-b phase shifter with design strategies for low rms phase/gain errors serves as the common leg of the RX and TX paths. In the RX mode, measurements show a gain of 17 dB, an output $P_{\mathrm { {-1~dB}}}$ of −1 dBm, an rms phase error less than 4°, and an rms gain error less than 0.6 dB with 0.528-W dc power from 30 to 40 GHz. In the TX mode, measurements show a gain of 14 dB, an output $P_{\mathrm { {-1~dB}}}$ of 20.5 dBm, an rms phase error less than 3.7°, and an rms gain error less than 0.55 dB with 1.587-W dc power from 30 to 40 GHz. The whole front-end occupies $3.2 \times 2.2$ mm2 including the testing pads. By choosing inductors and capacitors with reasonable values, designing a well-matched SPDT switch with high isolation, and optimum ordering of phase shift cells and LCAs in the phase shifter design, this TX/RX front-end achieves excellent rms phase/gain error performance without any trimming in a system-level measurement at Ka-band.