A Joint Decoding Strategy of Non-binary LDPC Codes Based on Retention Error Characteristics for MLC NAND Flash Memories

Abstract

A joint decoding strategy is proposed to reduce the time consumption of non-binary LDPC (NB-LDPC) decoding process. This strategy is based on the retention error characteristics of Multi-Level Cell (MLC) NAND flash memories. The raw bit error rate is estimated by an empirical formula of retention error increasing model. With the bit flip patterns caused by retention errors in a MLC NAND flash cell, the bit-granularity bit error rate (soft information) can be calculated according to the raw bit error rate (RBER). Then, the soft information is used as an input of the NB-LDPC decoder to accelerate the convergence of decoding process. The experimental results show that the proposed joint decoding strategy can reduce an average 20.5% of the time consumption of NB-LDPC decoding process (the maximum reduction reaches 65.1%). In addition, the error correction capability is almost doubled, while experiencing only little overhead.