A hybrid-radix approach for efficient implementation of unfolded CORDIC architectures for FPGA platforms

Abstract

CORDIC algorithms have long been used in digital signal processing for calculating trigonometric, hyperbolic, logarithmic and other transcendental functions. The algorithm requires only shift and add operations and this simplicity encourages its implementation in hardware. Traditional CORDIC architectures have focused on radix-2 implementations because of their higher accuracy. However these architectures are slow, requiring a lot of iterations to converge to a given solution. Radix-4 and higher radix architectures have been proposed to speed up the process by reducing the number of iterations, but they suffer from poor accuracy. In this paper a hybrid-radix approach to CORDIC implementation is proposed. By using this approach the algorithm can be implemented with higher speed, lower power and lesser area utilization and at the same time a good accuracy can be achieved. Further the hybrid-radix architecture has been retimed resulting in an increase in the overall throughput which is particularly important in DSP applications.