Abstract

A hybrid structured asymmetric switching capacitor multilevel inverter (ASC-MLI) is suggested in this work. The notion behind presenting this topology is to reduce the device count and DC sources as compared with conventional MLI. The step by step operating mode of single phase ASC-MLI is presented and by doing slight modifications the same configuration is used in three phase utility application and electric drive. The proposed configurations utilize major benefits of self-voltage balancing capability of capacitor voltage, which is independent from different load type and modulations index. To generate the switching pulse for corresponding switches the multi-carrier based sinusoidal pulse width modulation (MCS-PWM) technique is used; in addition to this simulation result are obtained using MATLAB/Simulink 2016b software version. Simulation results of an induction motor drive connected as three phase load highlights good performance of 17-level MLI.

Highlights

  • As the need for electrical power grows across the world, it is expected that power electronics system (PES) will be used in 100 percent of all electrical energy industry, changing the face of the electrical engineering sector [1]

  • The downside with Neutral Point Clamped (NPC) Multilevel Inverter (MLI) configuration is as the output voltage level increases, it requires additional clamping diodes and alarms whenever there is an unequal voltage sharing among capacitor which are connected in series [10]

  • In Cascaded H-bridge (CHB) MLI configuration, no flying capacitor & clamping diodes are used; the only limitations with this configuration is that it requires isolated dc source as the output voltage level increases

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Summary

INTRODUCTION

As the need for electrical power grows across the world, it is expected that power electronics system (PES) will be used in 100 percent of all electrical energy industry, changing the face of the electrical engineering sector [1]. The downside with NPC MLI configuration is as the output voltage level increases, it requires additional clamping diodes and alarms whenever there is an unequal voltage sharing among capacitor which are connected in series [10]. When using FCMLI, a high number of storage capacitors are required to increase the amount and quality of output voltage as the stages to get desired waveform [11,12]. In CHB MLI configuration, no flying capacitor & clamping diodes are used; the only limitations with this configuration is that it requires isolated dc source as the output voltage level increases. The majority of reported MLI topologies in recent years have been achieving high output voltage levels with minimal numbers of switches.

Proposed topology – I
Proposed topology –II
Findings
CONCLUSION
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