A Hybrid PWM Strategy for Switching Loss Reduction in Three-Level Inverters

Abstract

The advanced bus-clamping PWM (ABCPWM) sequences are well known to reduce line current THD in a three-level neutral point-clamped inverter. This paper deals with ABCPWM sequences employed optimally to achieve minimum switching loss throughout the linear operating region in a three-level inverter. The work extensively analyzes the performance of these sequences in terms of inverter switching loss and compares them with centered space vector modulation PWM (CSVPWM). Based on the analysis, a hybrid PWM scheme termed as <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">switching loss reduction</i> is proposed by optimally employing ABCPWM sequences in conjunction with variation in power factors. At a given average switching frequency, the proposed hybrid scheme reduces inverter switching loss compared to CSVPWM and the recently proposed discontinuous PWM-based optimization strategy at all power factors and modulation indices. With this scheme, switching loss reduces to 22% to 36% compared to CSVPWM and a maximum of 12% reduction than the existing optimization strategy. Furthermore, the scheme gives lower harmonic distortion compared to these two existing PWM schemes near high modulation indices and near unity power factor load. The theoretical, simulated, and real-time simulation results are presented with experimental results using TMS320F28335 DSP controller for validating the proposed work.