A hybrid level shifted carrier‐based PWM technique for modular multilevel converters

Abstract

This paper presents a hybrid level shifted carrier-based pulse width modulation (HLSC-PWM) technique for modular multilevel converters (MMCs). The concept of the proposed HLSC-PWM method is developed by combining the principles of phase disposition PWM (PD-PWM), phase opposition disposition PWM (POD-PWM), and alternate phase opposition disposition PWM (APOD-PWM) methods. The main aim of the proposed HLSC-PWM method is to generate an output voltage with half-wave and quarter-wave symmetries. The generated symmetrical PWM output voltage based on the proposed HLSC-PWM method provides less total harmonic distortion (THD) and enhances the DC-Link voltage utilization (DCLVU). A generalized mathematical model is formulated to develop a single HLSC for MMC with an N number of submodules (SMs) per arm. Theoretical analysis of DCLVU for the proposed method is described. The functionality and performance of the HLSC-PWM method are carried out on a three-phase five-level MMC in MATLAB/Simulink. A hardware prototype of a single-phase five-level MMC is designed for experimental validation. The proposed HLSC-PWM method is implemented on an Altera/Cyclone I series (EP1C12Q240C8N) field-programmable gate array (FPGA), simulation and experimental results are presented.