Abstract

In most grid-connected power converter applications, the phase-locked loop (PLL) is probably the most widespread grid synchronization technique, owing to its simple implementation. However, its phase-tracking performance tends to worsen when the grid voltage is under unbalanced and distorted conditions. Many filtering techniques are utilized to solve this problem, however, at the cost of slowing down the transient response. It is a major challenge for PLL to achieve a satisfactory dynamic performance without degrading its filtering capability. To tackle this challenge, a hybrid filtering technique is proposed in this paper. Our idea is to eliminate the fundamental frequency negative sequence (FFNS) and other harmonic sequences at the prefiltering stage and inner loop of PLL, respectively. Second-order generalized integrators (SOGIs) are used to remove FFNS before the Park transformation. This makes moving average filters (MAFs) eliminate other harmonics with a narrowed window length, which means the time delay that is caused by MAFs is reduced. The entire hybrid filtering technique is included in a quasi-type-1 PLL structure (QT1-PLL), which can provide a rapid dynamic behavior. The small-signal model of the proposed PLL is established. Based on this model, the parameter design guidelines targeting the fast transient response are given. Comprehensive experiments are carried out to confirm the effectiveness of our method. The results show that the settling time of the proposed PLL is less than one grid cycle, which is shorter than most of the widespread PLLs. The harmonic rejection capability is also better than other methods, under both nominal and adverse grid conditions.

Highlights

  • Grid synchronization is an important control aspect in grid-connected power converter (GPC)applications

  • A bigger bandwidth thanGMAF-phase-locked loop (PLL), which was similar toWith origin, quasi-type-1 PLL structure (QT1-PLL) had a bigger bandwidth than moving average filters (MAFs)-PLL, which was similar to synchronous-reference frame phase-locked loop (SRF-PLL)

  • Aiming at a rapid transient response, a hybrid filtering technique-based phase-locked loop is proposed in this paper to achieve an accurate phase-tracking performance, under both nominal and distorted grid conditions

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Summary

Introduction

Grid synchronization is an important control aspect in grid-connected power converter (GPC). With the increasing penetration of the distributed generation system and renewable energy sources, power quality issues have been introduced, which may cause grid voltages to be polluted [3,4]. Under such unbalanced and distorted grid voltage conditions, the phase-tracking performance of SRF-PLL deteriorates dramatically [5,6]. Energies 2018, 11, x capability degrading the dynamic performance major challenge of PLL distorted degradingwithout the dynamic performance is a major challengeisofa PLL under distorted gridunder conditions [8] It is a focus[8]. Of of grid connected power converter system with awith phase-locked loop (PLL)

Schematic
Brief Overview of QT1-PLL
It was observed that both
The Description of the Proposed PLL
Procedure
Small-Signal
Design
Results
13. Photograph
Phase Jump
Frequency Step Change
Frequency Ramp Change
50 Hz to 55 are
Unbalanced and Distorted Grid Voltages
Computational Burden
Summary
Conclusions
Full Text
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