A High-Voltage-Enabled Mobile-TV RF Front-End in 90-nm CMOS

Abstract

High-voltage (HV)-enabled circuits offer a feasible alternative to cope with the sub-1 V technologies at low cost. This chapter describes the first 2 × V DD-enabled mobile-TV RF front-end with TV-GSM interoperability. It is an on/off-chip co-design employing externally three customized UHF/VHF preselect filters, a RF switch and a balun. The integrated part includes: (1) a cascode-cascade inverter-based low-noise amplifier that features a high gain-to-power efficiency; (2) a linearized C-2C attenuator using reliable-overdriven MOS switches; (3) an inductive-peaking feedforward path that evens out the passband variation; and (4) two cascode I/Q mixer drivers capable to drive passive mixers with small gain and bandwidth reduction. Gate-drain-source engineering and self-biased structures are the keys enabling performance optimization with low power and no reliability risk. Fabricated in a 90-nm CMOS process with 1-V thin-oxide devices, the RF front-end measures 68-dB rejection at GSM-900 uplink, 0.7-dB passband roll-off, 3.9-dB noise figure and −5.5-dBm IIP3 at a maximum voltage gain of 26.2 dB. The core occupies 0.28 mm2 and draws 15 mW. The achieved power-performance metrics is favorably comparable with the prior arts.