Abstract
The design and implementation of an efficient hardware architecture in terms of speed and memory requirements for computing the tile-based two-dimensional forward discrete wavelet transform for the JPEG2000 still image compression standard, is described. This architecture is derived from a well-established architecture template for calculating the two-dimensional forward discrete wavelet transform. The filters of that template are replaced by our previously published throughput-optimized ones. A proper scheduling algorithm has been developed that is matched to the special features of our filtering units. Performance improvements are gained thanks to the throughput-optimized filters. Also, due to the developed scheduling algorithms, reduced memory requirements are achieved when compared with previously published architectures.
Published Version
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