Abstract

Solid-state photomultiplier (SSPM) arrays are a new technology that shows great promise to be used in PET detector modules. To reduce the number of channels in a PET scanner, it is attractive to use resistor dividers, which multiplex the number of channels in each module down to four analog output channels. It is also attractive to have SSPMs with large pixels (3×3 or 4×4 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). However, large area SSPMs have correspondingly large capacitances (up to 1 nF) and directly coupling them to a resistive network will create a low-pass filter with a high RC time constant. In order to overcome this, we have developed an application specific integrated circuit (ASIC) that “hides” the intrinsic capacitance of the SSPM array from a resistive network with current buffers, significantly improving the rise time of the SSPM signals when connected to the resistive network. The ASIC is designed for a wide range of SSPM sizes, up to 1 nF (equivalent to 4×4 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ), and for input currents of 1 to 20 mA per channel. To accommodate various sizes of SSPM pixels, the ASIC uses adjustable current sources (to keep the feedback loop stable). A test ASIC has been fabricated that has 16 input channels, an internal resistor divider array that produces four analog outputs, 16 buffers that isolate the SSPM capacitance from the resistor array, and four output buffers that can drive 100 ohm loads. Thus, detector modules based on SSPMs and this ASIC should be compatible with the block detector readout electronics found in many PET cameras. Tests of this ASIC show that its rise time is <; 2 ns (and it will thus not significantly degrade the ~7 ns rise time of the SSPM pixels) and that the analog decoding circuitry functions properly.

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