A high-speed FPGA implementation of a Bit-slice Ultra-Lightweight block cipher, RECTANGLE

Abstract

Field programmable gate arrays (FPGAs) are fundamental flexible integrated circuits that enable engineers to program any circuits that they want in the field. If we want to mention a practical building block of a system, FPGA shines as a really good option and when this equipment is more advanced, all digital circuits and systems can be placed on this so FPGAs can be configured as system on a chip (SoC). Today in security protocols, block ciphers are one of the important basis in ensuring security. In 2014 Wentao Zhang et al proposed a new Bit-slice Ultra-Lightweight block cipher named as RECTANGLE, which are suitable for extremely constrained environments and multiple platforms. In this paper, we simulate and synthesize the RECTANGLE lightweight algorithm. Our methodology is used high level synthesis for give more flexibility to achieve suitable throughput in our architecture. Implementation results of the RECTANGLE cryptography algorithm on a FPGA are presented. The design target is efficiency of throughput and speed.