A high-speed dual field arithmetic unit and hardware implementation

Abstract

Finite fields have been used for many types of public key cryptography, such as elliptic curve (EC) and RSA cryptosystems. This paper presents an arithmetic unit that support Galois fields GF(p) and GF(2m) for arbitrary prime numbers and irreducible polynomials respectively. The arithmetic unit can do the Galois field arithmetic operations of addition, subtraction, multiplication, squaring, inversion and division. The least significant bit first (LSB-first) scheme for modular multiplication and the extended Euclid's algorithm for modular inversion are both modified for the arithmetic unit. The architecture has been implemented using 0.18-mum CMOS standard cell library, the clock frequency can reach at least 250 MHz for a 256-bit arithmetic unit. Furthermore, any bit length can be supported by any hardware configuration so long as the memory capacity is sufficient.