Abstract
In this paper, we present the design of a low-power, high power supply rejection (PSR) voltage regulating circuit in a 0.35μm standard CMOS process. A CMOS full-wave bridge rectifier is designed to generate an unregulated DC voltage. A low dropout (LDO) series voltage regulator converts the unregulated voltage to a stable and clean DC supply voltage. A self-biased wide range and high power supply rejection ratio (PSRR) V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> voltage reference is introduced. Simulation results show that the proposed circuit provides 3V regulated DC output, exhibits load regulation factor of as low as 1% when delivering up to 30mA load current, and demonstrates line regulation factor of as low as 0.01%/V over 4.8V input amplitude variation.
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