A Highly Efficient Dual-Mode 3G/4G Linear CMOS Stacked-FET Power Amplifier Using Active-Bypass

Abstract

A highly efficient dual-mode linear CMOS stacked-FET power amplifier (PA) is implemented for 3G UMTS and 4G LTE handset applications. High efficiency is achieved at a backed-off output power (P out ) below 12 dBm by employing an active-bypass amplifier, which consumes very low quiescent current and has high load-impedance. The output paths between high-and low-power modes of the PA are effectively isolated by using a bypass switch, thus no RF performance degradation occurs at high-power mode operation. The fabricated 900 MHz CMOS PA using silicon-on-insulator(SOI) CMOS process operates with an idel current of 5.5 mA and show power-added efficiency (PAE) of 20.5%/43.5% at P out = 12.4/28.2dBm while maintaining an adjacent channel leakage ratio (ACLR) better than -39dBc, using the 3GPP uplink W-CDMA signal. The PA also exhibits PAE of 35.1% and ACLR E-UTRA of-33 dBc at P out = 26.5 dBm, using the 20 MHz bandwidth 16-QAM LTE signal.