Abstract
To achieve high efficiency at back-off output powers, a harmonic tuned Doherty power amplifier (DPA) using impedance buffer matching technique was presented for 5G applications. After obtaining the optimum fundamental and harmonic impedances using load-pull simulations, a harmonic control impedance matching network is proposed to design the output matching networks of the carrier and peaking amplifiers for high efficiency operation. To verify the proposed method, a 4.8-5.0 GHz highly efficient DPA was designed and measured. Measurement results show that the designed DPA has the saturated output power of higher than 41.5 dBm and the maximum efficiency is about 65%, while the efficiency at 6-dB back-off output power is higher than 50%. This method can enhance the back-off efficiency of the DPA effectively.
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