A High Transconductance β-SiC Buried-Gate Junction Field Effect Transistor

Abstract

An improved performance buried-gate junction field effect transistor (JFET) has been fabricated and evaluated. This structure employs an n-type R-SiC (111) thin film grown on the Si (0001) face of a p-type 6H β-SiC substrate. Electron-beam evaporated Ti/Au was used as an ohmic contact to the n-type β-SiC layer and thermally evaporated A1 was used to contact the n-type gate (substrate). Devices with 4μm gate lengths had a maximum room temperature transconductance of 20mS/mm, which is the highest reported for any β-SiC FET structure. The fabrication and performance of the improved devices will be compared with those of JFETs fabricated in similar β-SiC layers grown on a Si substrate. In addition, the experimental data have been analyzed using a charge control model. This analysis shows that the effective field-effect mobility (565 cm2/V-s) is close to the measured Hall mobility (470 cm2/V-s). Calculated drain current versus drain voltage (ID-VD) characteristics for a buried-gate JFET are in good agreement with the experimental data. Further improvements in device performance are anticipated as gate dimensions approach one micron or less.KeywordsGate VoltageDrain CurrentGate LengthDrain VoltageSpecific Contact ResistanceThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.